A large number of jobs in semiconductor industry fall in the category of Digital VLSI Design and Verification. With digital designs becoming more and more complex, demand of Digital VLSI Verification Engineers is on the rise. Increase in design complexity has not only led to an increase in the number of VLSI Verification jobs but has also convoluted the challenges which a Verification Engineer face on day-to-day basis. Overall, these changes have made Digital VLSI Verification a challenging but an interesting career option.
However, unlike a software job, many recent/new College Graduates often find it bit difficult to successfully land a job in the VLSI industry. This is partially due to the fact that the skills required to be successful in VLSI industry are much more advanced and involved than what is taught in Colleges/Universities through regular courses and curriculum. Additionally, absence of resources which can provide one-shop-stop solution and can aid Graduates/Experienced Folks in Interview preparation aggravate the problem.
Due to this, people aspiring for a career in Digital VLSI Verification domain often tend to ponder upon following questions before an Interview: How should I prepare for a Digital VLSI Verification Interview? What all topics do I need to know before I turn up for an interview? What all concepts do I need to brush up? What all resources do I have at my disposal for preparation? What does an Interviewer expect in an Interview?
If you have these questions in your mind, now your search ends here!
Keeping this problem statement and these questions in their minds, authors (and ) have recently launched a book: " ", e-book version of which is now available on .
This book enables the readers to practice and grasp important concepts that are applicable to Digital VLSI Verification domain (and Interviews) through a Question and Answer approach with detailed explanations of concepts.
Book also has an interesting section where four leaders from Digital VLSI Verification industry share their experiences (worth more than six decades in total) in interviewing candidates. These experiences will assist all the readers and help them being better prepared for Digital VLSI Verification interviews as they would get a glimpse of what to expect in an interview. Thanks to, , , and for sharing their precious views on “What do they look for while Interviewing candidates and how do they usually arrive at a decision if a candidate should be hired?”
To capture briefly:
Book consists of 500+ questions spread across nine sections which cover following topics.
- Digital Logic Design (Number Systems, Gates, Combinational, Sequential Circuits, State Machines, and other Design problems)
- Computer Architecture (Processor Architecture, Caches, Memory Systems)
- Programming (Basics, OOP, UNIX/Linux, C/C++, Perl)
- Hardware Description Languages (Verilog, SystemVerilog)
- Fundamentals of Verification (Verification Basics, Strategies, and Thinking problems)
- Verification Methodologies (UVM, Formal, Power, Clocking, Coverage, Assertions)
- Version Control Systems (CVS, GIT, SVN)
- Logical Reasoning/Puzzles (Related to Digital Logic, General Reasoning, Lateral Thinking)
- Non-Technical and Behavioral Questions (Most commonly asked)
Big thanks toand for providing detailed reviews and foreword on the book.
It has been a little over two weeks since release of this book. Book has been a huge hit, and it has been performing exceedingly well (actually better than what the authors had initially expected). Lot of good reviews and personal emails are making us feel that we are able to add lot of value through this book.
Authors would like to thank all the readers for their kind words and encouragement. You can
And lastly, there is also a surprise bonus e-Book which readers will discover while reading the book!
PS: This book is an independent work of the authors and is not endorsed by their employers!